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Logic & Output Power, Duty Cycle

Thermal

Driver IC dissipation from its logic and output stages, and the duty cycle the package allows.

Inputs

Board profile

Fills Ambient temperature and Junction temperature limit from your board profile.

V
A
25 mA
V
A
250 mA
A
7.5 mA
V
A
100 µA
%
°C/W
°C
°C

Results

1 to check
Average power at D = 41 %
618.8mW
Pass

Checked: PD ≤ 650 mW, the allowable average at TA = 85 °C

Allowable average power PD

(150 − 85) / 100

650mW
Junction temperature
146.9°C
All results (4)
Logic power, ON PI

n·VCC·ICC

525mW
Output power, ON PO

n·VCE(sat)·IC

700mW
Instantaneous ON power PON
1.225W
Instantaneous OFF power POFF

logic 158 mW + leakage 40 mW

197.5mW
If each ON time is longer than about 0.5 s, the junction follows the peak power, not the average. Then design for PON = 1.225 W, which needs Rθ ≤ 53.1 °C/W.
PD = D·PON + (1−D)·POFF

Accuracy

Source
  • Allegro MicroSystems AN295014 Rev. 1 Eq. 2–4 (2022)

Allegro MicroSystems AN295014 Rev. 1, Computing IC Temperature Rise, Eq. 2–4 (2022) the equation

Verified against

4 independent cases. See the working.

This is a design aid. The engineer remains responsible for the design and for checking the standard itself.

Parameter sweep

Vary one input over a range and see the answer and verdict at each step, as a table and a curve.Pro

Worst-case corners

Put a tolerance on each input and get the worst-case band around the answer.Pro

Waveform

The principle

A driver IC dissipates power in its logic and in its output stage. Add the two for the ON state and for the OFF state, then average over the duty cycle. For short pulses, that average sets the junction temperature.

Equation 2: logic-gate (supply) power
PI=n (VCCICC)P_I = n\,(V_{CC} I_{CC})
Use maximum datasheet values for the worst case.
Equation 3: output-stage power
PO=n (VCE(sat)IC)P_O = n\,(V_{CE(sat)} I_{C})
Total instantaneous power
PON=PI+POPOFF=PI(off)+PO(off)P_{ON} = P_I + P_O \qquad P_{OFF} = P_{I(off)} + P_{O(off)}
The OFF-state output term is leakage times OFF-state voltage: small, but not negligible at high voltage.
Equation 4: duty-cycle averaged power
PD=D PON+(1−D) POFFP_D = D\,P_{ON} + (1-D)\,P_{OFF}
Rearranged for the allowable duty cycle
D=PD−POFFPON−POFFD = \frac{P_D - P_{OFF}}{P_{ON} - P_{OFF}}
Here PD is the allowable average, (TJ(max) − TA)/Rθ.
  • nnnumber of gates or channels
  • VCC, ICCV_{CC},\,I_{CC}logic supply voltage and ON-state supply current
  • VCE(sat)V_{CE(sat)}output saturation voltage at the load current
  • ICI_{C}output load current
  • DDduty cycle, 0…1
  • PON,POFFP_{ON},P_{OFF}instantaneous dissipation in each state
More detail

Average versus peak

The package's thermal mass averages short pulses, so the junction follows the average power. That is why a low duty cycle allows a peak far above what the package could sustain continuously.

Only for short pulses. Averaging holds while each ON time is short against the package's thermal time constant. The classic rule of thumb for a small IC is under about 0.5 s. Longer, and the junction reaches steady state within one pulse, so design for the peak power.

Modern parts

For a MOSFET output, use ID²·RDS(on) in place of VCE(sat)·IC. The same averaging applies to PWM LED, solenoid, relay and motor drivers. The thermal time constant grows with package size, copper and heat sinking.

Worked example 4, how hard may I drive this part?
A four-channel power driver, R_θ = 100 °C/W, ambient 85 °C, 250 mA per output. Step 1, what the package can shed, on average: P_D(allowed) = (150 − 85)/100 = 0.65 W Step 2, what it burns while ON: P_I = 4 × (5.5 V × 26.5 mA) = 583 mW P_O = 4 × (0.7 V × 250 mA) = 700 mW P_ON = 1.283 W ← twice the allowance Step 3, what it burns while OFF (leakage is not zero): P_I = 4 × (5.5 V × 7.5 mA) = 165 mW P_O = 4 × (100 V × 0.1 mA) = 40 mW P_OFF = 205 mW Step 4, solve the averaging equation for D: D = (0.65 − 0.205)/(1.283 − 0.205) = 41 % The part cannot run continuously at this load, but it can run 41 % of the time, if each ON pulse stays under about 0.5 s.
Method and example parameters adapted from Allegro MicroSystems AN295014 Rev. 1, Computing IC Temperature Rise, Eq. 2–4 and its safe-operating-limit examples. The explanations are our own.

Engine version ⁨1.18.3⁩