Controlled Impedance & Delay
Characteristic impedance for six transmission-line types, propagation delay, and the critical length.
Inputs
Board profileFills Dielectric constant from your board profile.
Results
Not judged: no target impedance in this mode. The geometry is inside the model's validity range.
Show working
- Geometry ratio
w / h = 0.2 mm / 0.11 mm = 1.818 - Effective permittivity
ε_eff at w/h = 1.82, ε_r = 4.2, t = 35 µm, microstrip (Hammerstad-Jensen) = 3.009 - Characteristic impedance
Z₀ = f(w/h, ε_eff), microstrip (Hammerstad-Jensen) = 48.9 Ω
Hammerstad-Jensen
All results (2)
Accuracy
- Hammerstad and Jensen (1980)
- Cohn (1954)
Hammerstad and Jensen, Accurate Models for Microstrip Computer-Aided Design (1980) the equation
Cohn, Characteristic Impedance of the Shielded-Strip Transmission Line (1954) the equation
- Dielectric constant 1 to 20
Dielectric constant The closed-form fits were derived for ordinary laminate permittivities. Hammerstad and Jensen, 1980
Within their range, ε_r (quoted at one frequency, not yours) and etch tolerance move the answer more than model error does. Use the tolerance analysis to see the band.
Most of the uncertainty comes from Dielectric constant. Tighten that first.
3 independent cases. See the working.
This is a design aid. The engineer remains responsible for the design and for checking the standard itself.
Parameter sweep
Vary one input over a range and see the answer and verdict at each step, as a table and a curve.ProWorst-case corners
Put a tolerance on each input and get the worst-case band around the answer.ProGive at least one input a tolerance above zero.
Cross-section
The principle
Every trace over a reference plane is a transmission line. Whether you must treat it as one depends on the rise time, not the clock: if the round trip along the trace is comparable with the edge, reflections distort the waveform.
- trace width
- dielectric height to the reference plane (b for stripline)
- dielectric above an embedded trace
- copper thickness
- pair spacing, or the CPW gap to the coplanar ground
- 10–90 % rise time of the driver
- impedance of free space, 376.73 Ω
More detail
Layout rules
- Never route across a plane split. The return current cannot follow, and the loop area grows. It is a common cause of EMC failures.
- Add a return via next to any signal via that changes reference plane, or a decoupling capacitor if the planes are at different potentials.
- Match delay, not length. Microstrip and stripline on FR-4 differ, about 5.8 against 6.9 ps/mm.
Engine version 1.18.3