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سجل التغييرات الكاملالمحرّك 1.18.3

Junction Temperature & Safe Limits

Thermal

Junction temperature, allowable power, required R_θ or maximum ambient, with the derating line.

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المدخلات

ملف اللوحة

Fills Ambient temperature وJunction temperature limit from your board profile.

Still-air IC packages: 60–140 °C/W. See the Package Rθ table in Reference.
°C/W
The air at the part, inside the enclosure, not the room
°C
W
150 °C for most silicon ICs, 125 °C for many others. Use the datasheet value.
°C
°C

النتائج

1 للمراجعة
Junction temperature TJ

= 70 °C + 500 mW × 125.0 °C/W
132.5°C
راجِع

المعيار: TJ ≤ 125 °C, which keeps 25 °C of margin to TJ(max)
أظهر خطوات الحساب
  1. Junction temperatureT_J = T_A + P_D × R_θ = 70 + 500 mW × 125.0 °C/W = 132.5 °C
  2. Margin to the limitT_J(max) − T_J = 150 − 132.5 = 17.5 °C, target 25 °C
Temperature rise
+ 62.5°C
Margin to TJ(max)
17.5°C
كل النتائج (2)
Thermal resistance Rθ
125.00°C/W
Derating factor Gθ

Gθ = 1/Rθ
8mW/°C
Below TJ(max), but only 17.5 °C of margin against your 25 °C target.
60 °C/W80 °C/W100 °C/W145 °C/Wthis design, 125 °C/W

إلى أي حد نعرف هذا الرقم

من أين تأتي الطريقة
  • Allegro MicroSystems AN295014 Rev. 1 Eq. 1 (2022)

Allegro MicroSystems AN295014 Rev. 1, Computing IC Temperature Rise, Eq. 1 (2022) المعادلة

يُقاس مقابل: JEDEC JESD51-2, Integrated Circuits Thermal Test Method, still air

صادقة ضمن
  • Thermal resistance of the package you have 1 °C/W to 1000 °C/W

Thermal resistance of the package you have Below about 1 °C/W the part is on a heat sink and one resistance no longer describes it. Above about 1000 °C/W almost nothing carries the heat away.

مدى دقتها
The equation is exact arithmetic.

The uncertainty is all in R_θ, which depends on the board as much as the package: a datasheet figure from a JEDEC test board can be a factor of two off on yours.

عملياً يهيمن على عدم اليقين مدخل واحد: Thermal resistance of the package you have. ضيّقه يضِق معه الجواب.

JEDEC JESD51-2

يُقاس مقابل

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المسح البارامتري

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Heat path

المبدأ

Junction temperature sets an IC's life: run it hot and it wears out sooner and performs worse. The junction sits above the local ambient by the power it dissipates times the thermal resistance between them.

TJ(max) comes from the datasheet. Rθ comes from the package and your board. TA and PD come from your design.

Equation 1: the master relation
TJ=TA+PD RθT_J = T_A + P_D\, R_{θ}
Rearranged: PD(max) = (TJ(max) − TA)/Rθ, and Rθ(required) = (TJ(max) − TA)/PD.
Derating factor (thermal conductance)
Gθ=1RθPD(max)=(TJ(max)−TA) GθG_{θ} = \frac{1}{R_{θ}} \qquad P_{D(max)} = (T_{J(max)} - T_A)\, G_{θ}
Some datasheets give Gθ in mW/°C instead of Rθ. They are reciprocals.
Thermal resistance is a sum of parts
Rθ=RC+RL+RSR_{θ} = R_C + R_L + R_S
Chip, leadframe, and heat sink or surrounding air. Datasheets usually give only the total.
  • TJT_Jjunction (die) temperature, °C
  • TAT_Aambient temperature local to the package, °C
  • PDP_Dpower dissipated inside the device, W
  • RθR_{θ}thermal resistance junction-to-ambient, °C/W
  • GθG_{θ}derating factor (thermal conductance), W/°C
تفاصيل إضافية

Reading the derating chart

Each dashed line is a package. Allowable dissipation falls linearly with ambient, reaching zero at TJ(max). The line is a thermal limit only: the part's rated operating ambient still applies. The slope is the derating factor Gθ. Still-air IC packages are typically 60 to 140 °C/W, and the air around the package is usually the largest part of that.

When the numbers do not close

Four fixes, cheapest first:
1. Make less heat. Share the load, pre-regulate, or raise the efficiency.
2. Move the heat out faster. Copper area, thermal vias, a heat sink or forced air.
3. Lower the local ambient. Hot neighbours are part of TA. Move them, or move the IC.
4. Change the part. A better package or a more efficient device. This changes the schematic and layout.

Why margin matters

Life falls roughly exponentially with junction temperature. A common rule of thumb: every extra 10 °C halves it.

Two cautions on RθJA

  • It depends on the board. Datasheet values come from a JEDEC test board (JESD51). Your copper, airflow and neighbours can move it by a factor of two or three either way.
  • TA is the air at the part, inside the enclosure once everything has warmed up, not the room.
Worked example 1, how much can this package dissipate?
A 16-lead DIP with Kovar (iron-nickel-cobalt) leads, R_θ = 125 °C/W, in 70 °C air. Silicon limit 150 °C. Temperature budget = 150 − 70 = 80 °C P_D(max) = 80 / 125 = 0.64 W That is with zero design margin.
Worked example 2, when the datasheet gives a derating factor
A 14-lead DIP with copper leads, G_θ = 16.67 mW/°C, in 70 °C air. R_θ = 1/0.01667 = 60 °C/W P_D(max) = 80 °C × 16.67 mW/°C = 1.33 W Same outline as example 1, more than twice the capability, because the leadframe is copper instead of Kovar.
Worked example 3, junction temperature of a quad driver
R_θ = 60 °C/W, ambient 70 °C, four channels each driving 250 mA. Worst-case datasheet maxima, not typicals: V_CC = 5.25 V I_CC = 25 mA V_CE(sat) = 0.7 V I_C = 250 mA n = 4 Supply-side power P_I = 4 × (5.25 V × 25 mA) = 525 mW Output-stage power P_O = 4 × (0.7 V × 250 mA) = 700 mW Total P_D = 1.225 W T_J = 70 °C + 1.225 W × 60 °C/W = 143.5 °C Inside the limit by only 6.5 °C. A few degrees more local ambient takes it over.
Method and worked examples adapted from Allegro MicroSystems application note AN295014 Rev. 1, Computing IC Temperature Rise (MCO-0001326), first published in Machine Design, 9 June 1977. The example parameters are from that note; the explanations are our own. See also: JEDEC JESD51, which defines how RθJA, ΨJT and RθJC are measured.

إصدار المحرك ⁨1.18.3⁩